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Compilation and Synthesis for Embedded Reconfigurable by João Manuel Paiva Cardoso, Pedro C. Diniz, José Gabriel de

By João Manuel Paiva Cardoso, Pedro C. Diniz, José Gabriel de Figueiredo Coutinho, Zlatko Marinov Petrov

This publication offers thoughts to take on the layout demanding situations raised through the expanding variety and complexity of rising, heterogeneous architectures for embedded structures. It describes an technique in keeping with suggestions from software program engineering referred to as aspect-oriented programming, which enable designers to manage today’s subtle layout device chains, whereas conserving a unmarried program resource code. Readers are brought to the elemental techniques of an aspect-oriented, area particular language that permits keep watch over of a variety of compilation and synthesis instruments within the partitioning and mapping of an software to a heterogeneous (and in all probability multi-core) objective structure. a number of examples are offered that illustrate some great benefits of the procedure built for purposes from avionics and electronic sign processing. utilizing the aspect-oriented programming thoughts provided during this publication, builders can reuse broad sections in their designs, whereas maintaining the unique software source-code, hence selling developer productiveness in addition to structure and function portability. Describes an aspect-oriented technique for the compilation and synthesis of purposes concentrating on heterogeneous embedded computing architectures. contains examples utilizing an built-in instrument chain for compilation and synthesis. offers validation and evaluate for distinct reconfigurable heterogeneous architectures. allows layout portability, given altering aim units· permits builders to keep up a unmarried program resource code while concentrating on a number of architectures.

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Additional resources for Compilation and Synthesis for Embedded Reconfigurable Systems: An Aspect-Oriented Approach

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From the onset the LARA language was designed to be agnostic to existing (and possibly future) tools as well as to source programming languages. LARA descriptions can thus be applied to (and reused with) existing tools, while ensuring as much as possible the adoption of future technologies and the ability to specify future requirements. To this effect, the LARA semantics and the corresponding weaving engines provide a design-flow with seven key technologies, namely: 1. LARA language: LARA is an aspect-oriented programming (AOP) language designed to describe, based on user-knowledge, compilation and synthesis strategies and non-functional concerns, such as performance requirements.

Conversely, in the case of Catapult C the integration is accomplished by an external pragma-controlled interface. Here LARA aspects must direct the weaver to insert the specific Catapult C pragmas at the appropriate joint points to produce a transformed C code that once input to Catapult C will derive the expected hardware design implementation. Both these approaches, with obvious trade-offs between control and integration efforts, highlight the flexibility of the integration of third-party tools in the REFLECT toolchain that LARA aspects and their transformational capabilities enable.

This feedback allows run-time attributes and implementation properties to be used as part of a LARA strategy. The REFLECT design-flow is fully flexible regarding the compilation and synthesis flows it can use. In one synthesis flow, we target the Molen architecture implemented on the ML510 board [10]. The Harmonic tool generates C code partitions corresponding to the code that is to be executed in hardware and software. Partitions to be mapped to hardware are converted from C to VHDL using the hardware compilation flow based on the DWARV code generator and included in reflectc.

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